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Introduction to Business Operation

Design/Development


HIREC has successfully developed the ASICs such as 1M G/A and 25MIPS-class (25Million Instructions per Second-class) 64bit MPU, and now we are developing 320MIPS-class 64bit MPU.

HIREC designs, develops, manufactures and evaluates ASIC that customer demand for space applications. HIREC also conducts programming and screening services of FPGA/PROM.

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ASIC

1. 1M G/A, 25MIPS-class 64bit MPU

25mips64mpu
25MIPS-Class 64bit MPU

Based on contract with JAXA, HIREC has developed 1M G/A and 64bit MPU in cooperation with NEC, Toshiba, and Kyocera. HIREC led the development and conducted the screening/qualification tests.

These parts were installed on Advanced Land Observing satellite(ALOS), Engineering Test Satellite VIII(ETS-VIII), and H-II Transfer Vehicle(HTV).


2.16bit MPU

16mpu_big.jpg
16bit MPU

Based on contract with JAXA, HIREC developed the 16bit MPU in cooperation with Toshiba, Kyosera, and Nippon Avionics.


3. 320MIPS-class 64bit MPU

(DataSheet)
25mips64mpu
320MIPS-class 64bit MPU

Based on contract with JAXA, HIREC develops the 320MIPS-class 64bit MPU. The development is now in the stage of Qualification test and will be finished by March,2006.

In developing this MPU, HIREC applies IP core of 64bit MIPS 5KfTM and peripheral circuit IP of Eureka Technology IP ES510 system Controller. Also we installs HIREC original SEU hardened cells and Rad-Hardness QFP package for space radiations.



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FPGA/PROM Programming/Screening

For antifuse type FPGA and PROM, HIREC provides the programming service of the circuits that the customer designed or the designed programs.

To ensure safe application by customer, to meet quality level expected, HIREC conducts electrical parameters test, burn-in test and other screening tests of FPGA and PROM after programming.


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